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Quick Guide to Generate a SSDT for CPU Power Management

okaiuz said:
HI Rehabman, i've also tried to put any ssdt*.aml produced by ssdtPRgen script and set the correct order ssdt.aml, ssdt-1.aml, ssdt-2.aml an so on, and select dropoem=true, but still no success!I'll try again when i come back home.


I've noticed that the dsdt i've attached in previous post contains PR scope object.
i've patched with you patch and compiled with no error. i'll try it later!(i attache the patched dsdt)
Click to expand...

If you don't plan on patching the SSDTs, no need to place them in ACPI/patched. And... therefore... no need for DropOem=true.

If you are patching the SSDTs, keep in mind that SortedOrder must be used to set the correct SSDT load order. Without SortedOrder, the SSDTs in ACPI/patched do not load in a deterministic order.
 
OS: el capitanCPU: 4960 (non k)i have this.. Hwmonitor going crazy.. show me multiplier x37, x39, x51, x60, x71.. Only few times drop to x8i've followed this guide.. and copy ssdt.aml in ACPI/patched folder

Code: 
CPU Ratio Info:[/FONT]
[FONT=Menlo]------------------------------------[/FONT]
[FONT=Menlo]CPU Low Frequency Mode.............: 800 MHz[/FONT]
[FONT=Menlo]CPU Maximum non-Turbo Frequency....: 3500 MHz[/FONT]
[FONT=Menlo]CPU Maximum Turbo Frequency........: 3900 MHz[/FONT]
[FONT=Menlo]
[/FONT]
[FONT=Menlo]IGPU Info:[/FONT]
[FONT=Menlo]------------------------------------[/FONT]
[FONT=Menlo]IGPU Current Frequency.............:  200 MHz[/FONT]
[FONT=Menlo]IGPU Minimum Frequency.............:  200 MHz[/FONT]
[FONT=Menlo]IGPU Maximum Non-Turbo Frequency...:  350 MHz[/FONT]
[FONT=Menlo]IGPU Maximum Turbo Frequency.......: 1200 MHz[/FONT]
[FONT=Menlo]IGPU Maximum limit.................: No Limit[/FONT]
[FONT=Menlo]
[/FONT]
[FONT=Menlo]CPU P-States [ 37 (38) 39 ] iGPU P-States [ (4) ][/FONT]
[FONT=Menlo]CPU C3-Cores [ 0 1 3 ][/FONT]
[FONT=Menlo]CPU C6-Cores [ 0 1 2 ][/FONT]
[FONT=Menlo]CPU C7-Cores [ 0 1 2 ][/FONT]
[FONT=Menlo]CPU P-States [ (8) 35 37 38 39 ] iGPU P-States [ (4) ][/FONT]
[FONT=Menlo]CPU P-States [ 8 34 35 37 38 (39) ] iGPU P-States [ (4) ][/FONT]
[FONT=Menlo]CPU C3-Cores [ 0 1 2 3 ][/FONT]
[FONT=Menlo]CPU C6-Cores [ 0 1 2 3 ][/FONT]
[FONT=Menlo]CPU C7-Cores [ 0 1 2 3 ][/FONT]
[FONT=Menlo]CPU P-States [ 8 34 35 36 37 38 (39) ] iGPU P-States [ (4) ][/FONT]
[FONT=Menlo]CPU P-States [ 8 34 35 36 37 38 (39) ] iGPU P-States [ 4 (6) ][/FONT]
[FONT=Menlo]CPU P-States [ 8 34 35 36 37 38 (39) ] iGPU P-States [ 4 6 (9) ][/FONT]
[FONT=Menlo]CPU P-States [ 8 33 34 35 36 37 38 (39) ] iGPU P-States [ (4) 6 9 ][/FONT]
[FONT=Menlo]CPU P-States [ 8 31 33 34 35 36 37 38 (39) ] iGPU P-States [ (4) 6 9 ][/FONT]
[FONT=Menlo]CPU P-States [ 8 31 32 33 34 35 36 37 38 (39) ] iGPU P-States [ (4) 6 9 ][/FONT]
[FONT=Menlo]CPU P-States [ 8 31 32 33 34 (35) 36 37 38 39 ] iGPU P-States [ 4 6 9 (15) ][/FONT]
[FONT=Menlo]CPU P-States [ 8 31 32 33 34 35 36 37 38 (39) ] iGPU P-States [ 4 6 9 (13) 15 ][/FONT]
[FONT=Menlo]CPU P-States [ 8 31 32 33 34 35 36 37 (38) 39 ] iGPU P-States [ 4 6 9 (12) 13 15 ][/FONT]
[FONT=Menlo]CPU P-States [ 8 31 32 33 34 35 36 37 38 (39) ] iGPU P-States [ 4 6 9 (10) 12 13 15 ][/FONT]
[FONT=Menlo]CPU P-States [ 8 31 32 33 34 (35) 36 37 38 39 ] iGPU P-States [ 4 (5) 6 9 10 12 13 15 ][/FONT]

 
RehabMan said:
If you don't plan on patching the SSDTs, no need to place them in ACPI/patched. And... therefore... no need for DropOem=true.

If you are patching the SSDTs, keep in mind that SortedOrder must be used to set the correct SSDT load order. Without SortedOrder, the SSDTs in ACPI/patched do not load in a deterministic order.
Click to expand...

SOrry Rehab, but i don't understand...
I've placed the otput ssdts aml from ssdtPRgen script in /EFI/EFI/CLOVER/ACPI/patched/. If i've understand i've not to check dropoem or set table to drop from ssdt (eg CpuPm orCpu0Ist) in config.plist, it's right?
I've only to set the correct load order of ssdts generated by piker script in ACPI/patched (i suppose the load order is ssdt.aml, ssdt-1.aml, ssdt-2.aml and so on) it's right?

Another consideration:i'm unable to set macmini5,1 as smbios, the only that work for me is imac12,1, imac12,2 and macpro3,1. with macmini my system hang at the end of boot process.

One last thing: i've tried to load the last dsdt i've attached (dsdtpateched.aml , post #95), that is basically dhe same dsdt (dsdt.aml , post #93) with this patch applied:

Code: 
[FONT=Courier]
[/FONT][FONT=Courier]into scope label _PR remove_entry;

# For compatibility to RevoGirl style SSDT
into definitionblock code_regex . insert
begin
    Scope (_PR)\n
    {\n
        Processor (CPU0, 0x00, 0x00000410, 0x06) {}\n
        Processor (CPU1, 0x01, 0x00000410, 0x06) {}\n
        Processor (CPU2, 0x02, 0x00000410, 0x06) {}\n
        Processor (CPU3, 0x03, 0x00000410, 0x06) {}\n
        Processor (CPU4, 0x04, 0x00000410, 0x06) {}\n
        Processor (CPU5, 0x05, 0x00000410, 0x06) {}\n
        Processor (CPU6, 0x06, 0x00000410, 0x06) {}\n
        Processor (CPU7, 0x07, 0x00000410, 0x06) {}\n
    }\n
end;
[/FONT]

I've tried thie dsdt with this patched applied with macials, (with and without ssdt* in /ACPI7patched) and i've a KP on boot that says: Panic (cpu0 caller .....) "Should have 8 Threads, but only found 9 for Die 0"@/SourceCache/xnu/xnu-......" i don't remember the last part of KP


Thanks in advice for your help!:)
 
okaiuz said:
I've placed the otput ssdts aml from ssdtPRgen script in /EFI/EFI/CLOVER/ACPI/patched/.
Click to expand...

The only "output" from ssdtPRgen.sh is SSDT.aml.
 
Hi RehabMan can i pick your brains and stop mine from frying. I think i have read too much.

My mb = Z9PE-D8 WS fitted with dual E5-2680v1 (Sandy Bridge-E if i remember rightly).

When i try ssdtPRGen i get sandy bridge is not supported on Mac Pro 3,1 systems and a warning that the cpu might be changed to 0x0402 rather than 0x0602. It doesn't seem to matter what commands/options i apply the script seems to just ignore them and generates the same result every time.

So i get no speed stepping but my computer boots fine. CPU's locked at 2.7Ghz.

Now the tricky bit, when i try and match my cpu's to an apple of nearest Sandy Bridge type CPU the nearest i can get is an iMac 12,2 2011-2012
I use Mac Pro 3,1 smBIOS for over-all compatibility and ease of set-up (ha ha)
My socket type is 2011v2 which is what Mac Pro 6,1 uses but my CPU's are v1 as mentioned above.

Do i need to change my smBIOS type to get speed stepping (I hope not) since the one i use is from my dead Mac Pro?

Martin
 
please help i have this cpu and smbios:
Intel Core i7-4790K @ 4.0 GHz
Mac-FA842E06C61E91C5:iMac15,1

when i enter this command:
HTML: 
chmod -R 755 ~/Desktop/AppleIntelInfo.kext


my hackintosh freezes then reboots. it just freaks out. what can be causing it?
 
macincheese said:
please help i have this cpu and smbios:
Intel Core i7-4790K @ 4.0 GHz
Mac-FA842E06C61E91C5:iMac15,1

when i enter this command:
HTML: 
chmod -R 755 ~/Desktop/AppleIntelInfo.kext


my hackintosh freezes then reboots. it just freaks out. what can be causing it?
Click to expand...

Sounds like a Kernel Panic to me. Do you have a generated SSDT in EFI/Clover/ACPI/patched?
 
I have a 6700K and I'm using an iMac17,1 SMBIOS (because the ssdtPRGen.sh script complains when using MacPro3,1).

Without the SSDT, my states have range 10 (maybe 9?) to 46. Intel Power Gadget shows frequency jumping between 4.0 and 4.5 while running Geekbench 3, rarely reaching 4.6. Idle was usually 1 GHz.

After placing the new SSDT in Clover, my states range from 8 to 46. Intel Power Gadget shows frequency pegged at 4.6 GHz while running Geekbench 3. Idle is usually 0.9 GHz. The 8 state doesn't appear in /tmp/AppleIntelInfo.dat until after I quit Intel Power Gadget.

Geekbench 3 single-core score went from 4969 to 5351 after using the new SSDT.

I do not have DropOem or DropOEM_DSM or CStates or PStates enabled in Clover config.plist.

I like the 4.6 result. Eventually I would like to overclock to 4.7, but the BIOS doesn't have a quick setting for that (I would have to adjust voltage and stuff). I don't know if such an overclock would affect Mac OS X or if I'll need to generate a new SSDT.
 
i have a 6700 i use iMac14,2 SMBIOS, but for make the ssdt i use imac 17,2 (but graphics don't work, gtx970).
i obtain theese result, are ok?

f3U7qSw.png


greetings from spain :D
 
joevt said:
Geekbench 3 single-core score went from 4969 to 5351 after using the new SSDT.
Click to expand...

I don't understand what caused the performance improvement (see my previous post above). I don't think the number of P-States changed, so it must have been one or more of the registers (MSR*)?

Here's my before results:
Code: 
AppleIntelInfo.kext v1.4 Copyright © 2012-2015 Pike R. Alpha. All rights reserved

Settings:
------------------------------------
logMSRs............................: 1
logIGPU............................: 0
logIntelRegs.......................: 1
logCStates.........................: 1
logIPGStyle........................: 1
InitialTSC.........................: 0x41eeaab20e45
MWAIT C-States.....................: 1319200

Model Specific Regiters
------------------------------------
MSR_CORE_THREAD_COUNT......(0x35)  : 0x40008
MSR_PLATFORM_INFO..........(0xCE)  : 0x80838F1012800
MSR_PMG_CST_CONFIG_CONTROL.(0xE2)  : 0x1E000001
MSR_PMG_IO_CAPTURE_BASE....(0xE4)  : 0x1814
IA32_MPERF.................(0xE7)  : 0x3D3557087C
IA32_APERF.................(0xE8)  : 0x2DA3CB2C98
MSR_FLEX_RATIO.............(0x194) : 0xE0000
MSR_IA32_PERF_STATUS.......(0x198) : 0x278200002800
MSR_IA32_PERF_CONTROL......(0x199) : 0x2E00
IA32_CLOCK_MODULATION......(0x19A) : 0x0
IA32_THERM_STATUS..........(0x19C) : 0x88400800
IA32_MISC_ENABLES..........(0x1A0) : 0x850089
MSR_MISC_PWR_MGMT..........(0x1AA) : 0x18C1
MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x2E2E2E2E
IA32_ENERGY_PERF_BIAS......(0x1B0) : 0xF
MSR_POWER_CTL..............(0x1FC) : 0x2C005F
MSR_RAPL_POWER_UNIT........(0x606) : 0xA0E03
MSR_PKG_POWER_LIMIT........(0x610) : 0x42FFD0001AEA82
MSR_PKG_ENERGY_STATUS......(0x611) : 0xC60E6B8
MSR_PKG_POWER_INFO.........(0x614) : 0x2F8
MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x0
MSR_PP0_POWER_LIMIT........(0x638) : 0x0
MSR_PP0_ENERGY_STATUS......(0x639) : 0x34E3804
MSR_PP0_POLICY.............(0x63a) : 0x0
MSR_PKGC6_IRTL.............(0x60b) : 0x8876
MSR_PKGC7_IRTL.............(0x60c) : 0x8894
MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x3220604BEA8
MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x0
MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x0
MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0
IA32_TSC_DEADLINE..........(0x6E0) : 0x41EEADF466A7

CPU Ratio Info:
------------------------------------
CPU Low Frequency Mode.............: 800 MHz
CPU Maximum non-Turbo Frequency....: 4000 MHz
CPU Maximum Turbo Frequency........: 4600 MHz
CPU C6-Cores [ 0 1 2 3 4 5 6 7 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 ]
CPU P-States [ 9 (10) 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 ]

And here are my after results:
Code: 
AppleIntelInfo.kext v1.4 Copyright © 2012-2015 Pike R. Alpha. All rights reserved

Settings:
------------------------------------
logMSRs............................: 1
logIGPU............................: 0
logIntelRegs.......................: 1
logCStates.........................: 1
logIPGStyle........................: 1
InitialTSC.........................: 0x457df9ad245b
MWAIT C-States.....................: 1319200

Model Specific Regiters
------------------------------------
MSR_CORE_THREAD_COUNT......(0x35)  : 0x40008
MSR_PLATFORM_INFO..........(0xCE)  : 0x80838F1012800
MSR_PMG_CST_CONFIG_CONTROL.(0xE2)  : 0x1E000001
MSR_PMG_IO_CAPTURE_BASE....(0xE4)  : 0x1814
IA32_MPERF.................(0xE7)  : 0xDBFA74727
IA32_APERF.................(0xE8)  : 0x257AF6405D
MSR_FLEX_RATIO.............(0x194) : 0xE0000
MSR_IA32_PERF_STATUS.......(0x198) : 0x16F700000900
MSR_IA32_PERF_CONTROL......(0x199) : 0x2E00
IA32_CLOCK_MODULATION......(0x19A) : 0x0
IA32_THERM_STATUS..........(0x19C) : 0x883B0800
IA32_MISC_ENABLES..........(0x1A0) : 0x850089
MSR_MISC_PWR_MGMT..........(0x1AA) : 0x18C1
MSR_TURBO_RATIO_LIMIT......(0x1AD) : 0x2E2E2E2E
IA32_ENERGY_PERF_BIAS......(0x1B0) : 0x1
MSR_POWER_CTL..............(0x1FC) : 0x2C005F
MSR_RAPL_POWER_UNIT........(0x606) : 0xA0E03
MSR_PKG_POWER_LIMIT........(0x610) : 0x42FFD0001AEA82
MSR_PKG_ENERGY_STATUS......(0x611) : 0x29976EC
MSR_PKG_POWER_INFO.........(0x614) : 0x2F8
MSR_PP0_CURRENT_CONFIG.....(0x601) : 0x0
MSR_PP0_POWER_LIMIT........(0x638) : 0x0
MSR_PP0_ENERGY_STATUS......(0x639) : 0x177EABE
MSR_PP0_POLICY.............(0x63a) : 0x0
MSR_PKGC6_IRTL.............(0x60b) : 0x8876
MSR_PKGC7_IRTL.............(0x60c) : 0x8894
MSR_PKG_C2_RESIDENCY.......(0x60d) : 0x5C502B0870
MSR_PKG_C3_RESIDENCY.......(0x3f8) : 0x0
MSR_PKG_C6_RESIDENCY.......(0x3f9) : 0x0
MSR_PKG_C7_RESIDENCY.......(0x3fa) : 0x0
IA32_TSC_DEADLINE..........(0x6E0) : 0x457DFCE4D504

CPU Ratio Info:
------------------------------------
CPU Low Frequency Mode.............: 800 MHz
CPU Maximum non-Turbo Frequency....: 4000 MHz
CPU Maximum Turbo Frequency........: 4600 MHz
CPU C6-Cores [ 0 1 2 3 4 5 6 7 ]
CPU C3-Cores [ 0 1 2 3 4 5 6 7 ]
CPU P-States [ 8 (9) 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 ]
Obtained CPU P-States [ (8) (9) (10) (11) (12) (40) (46) ]

I removed the extra CPU lines since I believe only the last occurrence of each line is relevant. The following command can do the same formatting:
Code: 
sudo cat /tmp/AppleIntelInfo.dat | perl -E 'my(%a,%b);while(<>){if(/^CPU P-States \[[ \d]*\((\d+)\)/){$b{$1}=$1;}if(/^CPU ((P-States)|(C\d+-Cores))/){$a{$1}=$_;}else{print $_;}}foreach(sort values%a){print $_;}print"Obtained CPU P-States [";foreach(sort {$a<=>$b}values%b){print " (".$_.")";}print" ]\n"'

Does anyone know which of the registers could be causing the improved performance? If it is one of the registers, then it would be useful for AppleIntelInfo.kext to translate the displayed register values. I suppose I could look the registers up in an Intel manual (I think they're free to download) but I'm asking here in case someone already knows.
 
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